Combinational Logic Circuits Question & Answers September 27, 2021 By WatElectronics This article lists 100+ Combinational logic circuits MCQs for engineering students. All the Combinational logic circuits Questions & Answers given below include solution and link wherever possible to the relevant topic. Combinational logic circuits are used to design complicated switching circuits by using basic logic gates like NOR, NAND, or NOT by connecting together. These logic gates work like basic building blocks for these circuits. Combinational logic circuits can be specified through three main methods like Boolean algebra, truth table, and logic diagram. Combinational logic circuits can also be considered like decision-making circuits because these circuits combine different logic gates as one to process different signals to generate as a minimum one output signal based on the logical function of every logic gate. These circuits are designed with individual logic gates to perform a preferred application like Encoders, Decoders, Multiplexers, De-multiplexers, Full Adders & Half Adders. The applications of combinational circuits include comparators, calculators, computers, ADC, DAC, digital processing, industrial processing, PLDs, converters, etc. 1). The number of gates per chip is decided by----------? The number of pins available on IC The number of gates required for an application. Size of the IC All of the above None Hint 2). Flat pack and dual-in-line packages have ------- leads? Eight leads Ten leads Thirteen leads Fourteen leads None Hint 3). Small scale integrated Circuit has------ gates per chip? 10 11 12 13 None Hint 4). Medium scale integration has -------gates per chip? 100 <100 >100 500 None Hint 5). Multiplication can be done by-------- Repeated Addition Repeated subtraction Repeated division None of the above None Hint 6). In combinational circuits output depends on----------- Previous output Present inputs Previous inputs Both a & b None Hint 7). Two input adder is called------? Full adder Half adder Sequential adder None of the above None Hint 8). A half adder has ---------input and ---------output One input and one output One input and two output Two input and one output Two input and two output None Hint 9). In half adder, the output D obeys---------function AND EXCLUSIVE OR EXCLUSIVE AND NAND None Hint 10). A full adder has-----input and------output? Please refer to this link to know more about Full Adder Two input and two output Two input and three output Three input and two output Three input and three output None Hint 11). In serial adder inputs, A and B are--------pulse trains. Synchronous Asynchronous Reciprocal None of the above None Hint 12). Parallel adder is-------- -serial adder. Slower than Equal to Faster than None of the above None Hint 13). In serial arithmetic--------full adders are needed?. 1 2 3 4 None Hint 14). In parallel addition, the number of full adders is------? 2 3 Equal to the number of bits Less than the number of bits None Hint 15). To subtract a 4-bit number A from a 4-bit number B we required to ------ B, A, 1 Add Subtract Multiply Divide None Hint 16). Exclusive-NOR gate is an----------- Equality decoder Inequality decoder Equality encoder Inequality encoder None Hint 17). The logic gate for which output is equal to 1 only when both the inputs are 1 is------------- NOT gate OR gate AND gate NAND gate None Hint 18). To check whether the sum of the bits is even or odd ------ is used. Half adder Parity checker Comparator All of these None Hint 19). In Exclusive – OR gate, the output is 1 only when the sum of the inputs is------ Even Odd Null None of these None Hint 20). In the parity bit generator circuit given below, even parity is represented when P = ? Add description here! 0 1 A B None Hint 21). In the transmission of binary information from a transmitter to a receiver, when parity checker is used, P = 0 indicates Error in the message No error Message received No message None Hint 22). Exclusive-NOR is used as----- Please refer to this link to know more about Logic Gates Parity generator Decoder Multiplexer Comparator None Hint 23). When we choose a single line for execution from available 16 lines, each of 4-bit, then the process is called---------? Encoding Decoding Mapping All of these None Hint 24). The code in which each decimal digit is replaced by a combination of four binary digits is----------- Excess-3 Grey code BCD All of these None Hint 25). The below BCD to decimal decoder gives the decimal value for input ABCD = 0000 ------ Add description here! 2 3 4 5 None Hint Combinational Logic Circuits MCQs for Interviews None 26). If a signal has to be sent on one of N available lines-----------is used. Multiplexer Demultiplexer Encoder Decoder None Hint 27). The multiplexer is also known as------------- Data selector Parity checker Data driver All of these None Hint 28). TI 74154 is a...? Parity checker Encoder Comparator Decoder None Hint 29). TI 74150 is a...? Multiplexer Demultiplexer Encoder Decoder None Hint 30). TI 54L85 is a Parity generator Comparator Encoder Decoder None Hint 31). The multiplexer is also used as--? Parity generator Comparator Parallel to serial converter Serial to parallel converter None Hint 32). ROM uses------processes for code conversions Decoding Encoding Both a and b None of these. None Hint 33). The input-output relationship of ROM can be modified accordingly? True False Only sometimes Both b & c None Hint 34). The size of the ROM when input M = 10 and output N= 8 is--------- memory. 1024 bits 6400 bits 8192 bits None of these None Hint 35). ROM can also be used as------ Sequence generator Character generator Look up table All of these None Hint 36). Which of the following logic gates are used for code conversion? AND Gates AND-OR Logic Gates NOR Gates Ex-OR Gates None Hint 37). The steps involved in designing combinational logic circuits are 2 Steps 3 Steps 5 Steps 6 Steps None Hint 38). The circuits which use memory elements is known as Logic Gates Sequential Circuits Adder Subtractor None Hint 39). Which of the following logic gates are used to build a half adder ? OR & NAND gate AND & EX-OR EX-OR & AND AND & OR None Hint 40). The inputs of half adder is 0 2 3 4 None Hint 41). Which of the following gate is one of the universal gates? OR AND NAND NOT None Hint 42). How many FAs & HAs are required to include a 16-bit number? 8 HAs, 8 FAs 1 HA, 15 FAs 15 HAs, 1 FA 12 FAs 4 HAs None Hint 43). Which of the following expression is used for carry propagation (Cp)? Cp = A*B Cp = A’*B’ Cp = A-B Cp = A+B None Hint 44). In arithmetic addition, the MSB is known as Input Carry Output Zero bit None Hint 45). How many combinational inputs does a 3 bit FA or full adder includes? 2 3 4 8 None Hint 46). To decode binary 1101, which of the below logic gate combinations are used? AND gate with 4-inputs -1 4-input AND gate -1 & Inverter -1 4-input AND gate – 1 & OR gate - 1 4-input NAND gate -1 & Inverter-1 None Hint 47). Which of the following is the best example of a combinational logic circuit? Counters Multiplexers Flip Flops Shift Registers None Hint 48). In K-map, which of the following order sequence is correct for the input values representation? (00, 01, 10, 11) (00, 10, 01, 11) (00, 01, 11, 10) (00, 10, 11, 01) None Hint 49). For labeling the K-map cells, which of the following code is used? BCD ASCII Binary Gray None Hint 50). When an inverter is connected to the AND gate’s output then what logic function can be generated? OR Ex-OR NAND NOR None Hint Combinational Logic Circuits MCQs for Exams None 51). Which of the logic gate is also called a coincidence detector? NAND gate NOR gate AND gate Ex-NOT gate None Hint 52). The necessary time to change the state for an inverter/gate is called? Charging time Propagation time Decay time Rise time None Hint 53). Which of the following logic gate is used to test odd parity? AND Gate NOR Gate NOT Gate Ex-OR Gate None Hint 54). Which of the following logic gate cannot perform toggle operation? NOR gate NAND gate AND gate NOT gate None Hint 55). If a logic gate includes 4 inputs then how many possible combinations can be performed? 3 9 12 16 None Hint 56). Which of the following combinational logic circuit is used to generate a specific binary number? Encoder Decoder MUX De-mux None Hint 57). Which of the following IC is used to achieve less power dissipation? MOS IC BiCMOS IC CMOS IC ECL ICs None Hint 58). Which of the following adder is used to include more numbers at a time? Carry save Full adder Ripple carry Half adder None Hint 59). Which of the following decoder inputs & outputs will allow 54 dissimilar i/p combinations? 5 12 6 16 None Hint 60). What are the inputs and outputs of a full adder? Inputs - 4 & Outputs - 2 Inputs - 2 & Outputs-2 Inputs -3 & Outputs-1 Inputs -2 & Outputs-3 None Hint 61). What are the inputs & outputs of a half adder? Inputs - 3 & Outputs - 2 Inputs - 2 & Outputs-1 Inputs -2 & Outputs-2 Inputs -4 & Outputs-4 None Hint 62). How many bits are used to perform an addition operation in Half adder (HA)? 3 2 4 6 None Hint 63). How many half adders and full adders does a Ripple carry adder used for adding two n-bit numbers? Half adders -2 Full adders-2 Half adder-1 & Full adder-1 Half adders-2 & Full adders-2 None Hint 64). How many select input lines are there in 1-8 Demux? 2 4 6 8 None Hint 65). The input data to a preferred output line is directed through…? Adder Subtractor Multiplexer Demultiplexer None Hint 66). A de-multiplexer is used to change…? Addition of two serial data Data conversion from serial to parallel Data conversion from parallel to serial Addition of two parallel data None Hint 67). How many full adders or FAs does a BCD adder use? 1 2 3 4 None Hint 68). How many parallel adders are required for a BCD subtractor? 1 2 3 4 None Hint 69). Which of the following logic gate is used in code conversion circuits? NAND AND Ex-OR AND-OR None Hint 70). Which of the following is used to change AND gates to NAND? AND gate invert OR gate invert Ex-OR gate invert Ex-NOR gate invert None Hint 71). The process used for combinational circuit analysis? Invert Reverse Direct Indirect None Hint 72). When two bits are subtracted then the outcome is called? Carry bit LSB MSB Difference bit None Hint 73). Which of the following is used to obtain the truth table directly? Logic diagram Expression Map Flow chat None Hint 74). The function used to describe combinational logic circuit is? Linear Geometric Algebraic Boolean None Hint 75). Which of the following circuit is used in between two systems that have dissimilar codes? Sequential Conversion Combinational Combinational sequence None Hint Combinational Logic Circuits MCQs for Quiz None 76). Which of the following circuit is used in between two systems that have dissimilar codes? Sequential Conversion Combinational Combinational sequence None Hint 77). Why Ex-OR gate is also known as an inverter? Due to same input Due to the same output It works like a NAND gate It works like NOR gate None Hint 78). When several inputs are active concurrently, then that procedure is known as? FIFO Priority decoding Priority encoding Ripple blanking None Hint 79). Which of the following is used to demonstrate the multiplexer principle? Rotating switch DPDT Linear stepper Relay with a single pole. None Hint 80). In the combinational logic circuit, every output mainly depends completely on the ……….i/ps of the circuit. Common Different Immediate Not Equal None Hint 81). In which of the following circuit, the output mainly depends on the past & present inputs? Combinational Parallel Serial Sequential None Hint 82). In the combinational circuit, which of the following process statement is used? Clocked Unclocked Sequential Combinational None Hint 83). Which of the following adder is used to calculate the arithmetic sum within a parallel way? Serial Adder Adder Parallel Adder Sequential Adder None Hint 84). Which of the following logic gate is a combinational circuit? AND Ex-OR NOT OR None Hint 85). Which of the following device is used as a converter? MUX De-Mux Encoder Decoder None Hint 86). 4:1 MUX includes how many inputs? 1 3 4 6 None Hint 87). Which of the following switch is used to demonstrate the principle of a MUX? Rotary switch DPDT SPDT SPST None Hint 88). The I/O of an analog MUX/DeMux are…? Unidirectional Bidirectional Binary to coded decimal Odd parity None Hint 89). What is the main function of an enable i/p on a MUX IC? To provide VCC For connecting GND To enable the chip To disable the chip None Hint 90). Which of the following is called strobe in multiplexer? Enable input Sink Select input Select output None Hint 91). The IC used to implement 1:16 DEMUX is? 74150 IC 74154 IC 74138 IC 74154 IC None Hint 92). In 1 to 8 MUX, how many AND gates are necessary? 2 4 6 8 None Hint 93). How many NOT logic gates are used in 4:1 MUX? 2 3 4 5 None Hint 94). Which of the following device is also called a transducer? Multiplexer Encoder Logic Gates Decoder None Hint 95). The process of recording music in a recorder is called? Encoding Decoding Multiplexing Demultiplexing None Hint 96). How many combinations are required for an 8-bit encoder? 2^3 2^4 2^6 2^8 None Hint 97). How many inputs are there for decimal to BCD converter? 4 6 8 10 None Hint 98). A decimal to BCD converter includes how many outputs? 4 7 9 10 None Hint 99). Which of the following device is used to change the code to a set of signals? Mux Encoder Decoder Register None Hint 100). Which of the following is a common type of decoder? Line Pin Row Column None Hint Time's up
